Side Channel Attack

A side channel attack is an attack on a computer system that gathers information from the physical side effects of its work, rather than from weaknesses in the algorithm itself. As a chip or program performs a calculation, it takes a certain amount of time, draws a certain amount of power, gives off faint electromagnetic signals and even produces sound. If those effects vary with the secret being used, careful measurement can reveal it.

Side channels are a major concern wherever secret keys are handled: bank cards, payment terminals, hardware security modules, smartphones, cloud servers and crypto hardware wallets. Strong public-key cryptography or symmetric encryption can still be defeated if its implementation leaks. That is why security certifications for chips test resistance to these attacks, and why tamper-resistant secure elements exist.

Picture a safe-cracker in an old film, pressing an ear to the door while turning the dial and listening for the faint click when a number is right. The safe's design may be excellent, but it gives away information through sound. The safe-cracker never breaks the lock; they just listen to it working.

Side channel attacks are the digital version. Instead of a click, an attacker might measure how many microseconds a card takes to answer, or how much power a chip draws at each step, and use those clues to rebuild the secret key bit by bit.

• Timing attacks. If an operation takes longer for some key values than others, measuring response times can reveal the key. Paul Kocher described practical timing attacks on RSA and other schemes in 1996.
• Power analysis. Recording a chip's power consumption during cryptographic operations can expose key bits. Simple and differential power analysis were published by Kocher and colleagues in 1999 and transformed smart card security.
• Electromagnetic analysis. Emissions picked up by an antenna near a device can carry similar information to power traces, sometimes from a distance.
• Cache and microarchitectural attacks. Programs sharing a processor can infer another program's secrets from how it uses the chip's memory caches. The Spectre and Meltdown flaws disclosed in January 2018 showed that features designed to speed up processors could leak data between programs.
• Fault injection. Strictly an active cousin of side channels, these attacks disturb a chip with voltage spikes, clock glitches or lasers to make it skip checks or reveal data.
• Acoustic and optical attacks. Researchers have recovered keys or typed text from sounds and from tiny changes in light emitted by devices.

Bank cards with an EMV chip are designed and certified to resist power and timing analysis, since anyone could take a card to a lab. Payment terminals and HSMs include shielding and tamper sensors. Hardware wallets face a similar threat model: if a thief obtains the device, can they extract the private key or seed phrase? Security researchers, including teams at wallet makers and exchanges, have published attacks using voltage glitching and power analysis against some wallet models, which led manufacturers to update firmware, change hardware or adopt secure element chips. Some makers run a bug bounty that pays researchers for responsibly reporting such flaws. Users who keep large balances in cold wallets are often advised to add a passphrase to their seed, so that a key extracted from the chip alone is not enough to reach the funds. Software wallets on shared computers can be exposed to cache-based attacks from malicious programs running on the same machine.

• Constant-time code. Writing cryptographic software so that its timing and memory access patterns do not depend on secret values.
• Masking and blinding. Mixing random values into calculations so that power traces do not line up with the key.
• Hardware protection. Shielding, noise generators, tamper detection and certified secure chips.
• Isolation. Keeping keys on dedicated, air-gapped devices and avoiding shared hardware for sensitive operations.

Many side channel attacks need physical access, specialist equipment and many measurements, so they are mainly a risk for stolen devices, lost cards or determined, well-funded attackers. Remote timing and cache attacks are harder to rule out, particularly in shared cloud computing environments, where providers have responded with hardware isolation and techniques grouped under confidential computing, which have themselves been targeted by side channel research. For banks and payment firms, side channels are one part of wider cybersecurity risk and are usually addressed through certified hardware and supplier testing rather than in-house research. For ordinary users, the practical lesson is to keep devices physically secure, apply firmware updates and use products whose security has been independently tested.